Module Parameter.Std_logic_vector

type t
val compare : t -> t -> Hardcaml__.Import.int
val sexp_of_t : t -> Ppx_sexp_conv_lib.Sexp.t
include Hardcaml__.Import.Equal.S with type t := t
type t
val equal : t Hardcaml__.Import.Equal.equal
include Hardcaml__.Import.Stringable.S with type t := t
type t
val of_string : string -> t
val to_string : t -> string
module Unstable : Hardcaml__.Import.Unstable with type t = t
val create : Std_logic.t Hardcaml__.Import.list -> t
val width : t -> Hardcaml__.Import.int
val of_bits : Bits.t -> t