Module `Hardcaml.Cosim2`

Icarus Verilog Cosimulation interface (DEPRECATED)

include Hardcaml__.Cosim2_intf.Cosim2

type delta_message = { sets : (int * int32 list) list; gets : int list; delta_time : int64; }: run sets, then gets then schedule next callback at cur_time+delta_time

type init_message = string list: expected inputs and outputs

type control_message = | Finish | Run of delta_message: control message

type response_message = (int * int32 list) list: response message

val net_addr : string
val net_port : int

module Comms : sig ... end: basic TCP communications between client (simulation) and server (hardcaml)

val control : Unix.file_descr -> control_message -> response_message: send a control message to the simulation

val write_testbench : ?⁠dump_file:string -> name:string -> inputs:(string * int) list -> outputs:(string * int) list -> (string -> unit) -> unit: write test harness

val write_testbench_from_circuit : ?⁠dump_file:string -> (string -> unit) -> Circuit.t -> unit: write test hardness derivied from a hardcaml circuit

val derive_clocks_and_resets : Circuit.t -> string list * string list: find clocks and resets in a hardcaml circuit

module type Simulator = Hardcaml__.Cosim2_intf.Simulator

module Icarus : Simulator

module Mti32 : Simulator

module Mti64 : Simulator

module Make : functor (SIM : Simulator) -> sig ... end