Module Parameter.Bit_vector
- val compare : t -> t -> Hardcaml__.Import.int
- val sexp_of_t : t -> Ppx_sexp_conv_lib.Sexp.t
include Hardcaml__.Import.Stringable.S with type t := t
module Unstable : Hardcaml__.Import.Unstable with type t = t- val create : Hardcaml__.Import.bool Hardcaml__.Import.list -> t
- val width : t -> Hardcaml__.Import.int
- val of_bits : Bits.t -> t