Module Parameter.Value

type t =
| Bit of Hardcaml__.Import.bool
| Bit_vector of Bit_vector.t
| Bool of Hardcaml__.Import.bool
| Int of Hardcaml__.Import.int
| Real of Hardcaml__.Import.float
| Std_logic of Std_logic.t
| Std_logic_vector of Std_logic_vector.t
| Std_ulogic of Std_logic.t
| Std_ulogic_vector of Std_logic_vector.t
| String of Hardcaml__.Import.string
val compare : t -> t -> Hardcaml__.Import.int
val sexp_of_t : t -> Ppx_sexp_conv_lib.Sexp.t
val bit : Hardcaml__.Import.bool -> t
val bit_vector : Bit_vector.t -> t
val bool : Hardcaml__.Import.bool -> t
val int : Hardcaml__.Import.int -> t
val real : Hardcaml__.Import.float -> t
val std_logic : Std_logic.t -> t
val std_logic_vector : Std_logic_vector.t -> t
val std_ulogic : Std_logic.t -> t
val std_ulogic_vector : Std_logic_vector.t -> t
val string : Hardcaml__.Import.string -> t
module Variants : sig ... end
include Hardcaml__.Import.Equal.S with type t := t
type t
val equal : t Hardcaml__.Import.Equal.equal
module Unstable : Hardcaml__.Import.Unstable with type t = t