Module Fifo.Of_signal

type comb = Hardcaml.Signal.t
type t = comb t
val sexp_of_t : t -> Ppx_sexp_conv_lib.Sexp.t
val widths : t -> Hardcaml__.Import.int t
val assert_widths : t -> Hardcaml__.Import.unit
val of_int : Hardcaml__.Import.int -> t
val of_ints : Hardcaml__.Import.int t -> t
val const : Hardcaml__.Import.int -> t
val consts : Hardcaml__.Import.int t -> t
val pack : ?⁠rev:Hardcaml__.Import.bool -> t -> comb
val unpack : ?⁠rev:Hardcaml__.Import.bool -> comb -> t
val mux : comb -> t Hardcaml__.Import.list -> t
val mux2 : comb -> t -> t -> t
val concat : t Hardcaml__.Import.list -> t
val priority_select : ((comb, t) Hardcaml.With_valid.t2 Hardcaml__.Import.list -> (comb, t) Hardcaml.With_valid.t2) Hardcaml.Comb.optional_branching_factor
val priority_select_with_default : ((comb, t) Hardcaml.With_valid.t2 Hardcaml__.Import.list -> default:t -> t) Hardcaml.Comb.optional_branching_factor
val onehot_select : ((comb, t) Hardcaml.With_valid.t2 Hardcaml__.Import.list -> t) Hardcaml.Comb.optional_branching_factor
val wires : ?⁠named:Hardcaml__.Import.bool -> ?⁠from:t -> Hardcaml__.Import.unit -> t
val assign : t -> t -> Hardcaml__.Import.unit
val (<==) : t -> t -> Hardcaml__.Import.unit
val inputs : Hardcaml__.Import.unit -> t
val outputs : t -> t
val apply_names : ?⁠prefix:Hardcaml__.Import.string -> ?⁠suffix:Hardcaml__.Import.string -> ?⁠naming_op:(comb -> Hardcaml__.Import.string -> comb) -> t -> t