Module Std_logic.Variants
val u : t Variantslib.Variant.tval x : t Variantslib.Variant.tval l0 : t Variantslib.Variant.tval l1 : t Variantslib.Variant.tval z : t Variantslib.Variant.tval w : t Variantslib.Variant.tval l : t Variantslib.Variant.tval h : t Variantslib.Variant.tval don't_care : t Variantslib.Variant.tval fold : init:'acc__ -> u:('acc__ -> t Variantslib.Variant.t -> 'acc__) -> x:('acc__ -> t Variantslib.Variant.t -> 'acc__) -> l0:('acc__ -> t Variantslib.Variant.t -> 'acc__) -> l1:('acc__ -> t Variantslib.Variant.t -> 'acc__) -> z:('acc__ -> t Variantslib.Variant.t -> 'acc__) -> w:('acc__ -> t Variantslib.Variant.t -> 'acc__) -> l:('acc__ -> t Variantslib.Variant.t -> 'acc__) -> h:('acc__ -> t Variantslib.Variant.t -> 'acc__) -> don't_care:('acc__ -> t Variantslib.Variant.t -> 'acc__) -> 'acc__val iter : u:(t Variantslib.Variant.t -> Hardcaml__.Import.unit) -> x:(t Variantslib.Variant.t -> Hardcaml__.Import.unit) -> l0:(t Variantslib.Variant.t -> Hardcaml__.Import.unit) -> l1:(t Variantslib.Variant.t -> Hardcaml__.Import.unit) -> z:(t Variantslib.Variant.t -> Hardcaml__.Import.unit) -> w:(t Variantslib.Variant.t -> Hardcaml__.Import.unit) -> l:(t Variantslib.Variant.t -> Hardcaml__.Import.unit) -> h:(t Variantslib.Variant.t -> Hardcaml__.Import.unit) -> don't_care:(t Variantslib.Variant.t -> Hardcaml__.Import.unit) -> Hardcaml__.Import.unitval map : t -> u:(t Variantslib.Variant.t -> 'result__) -> x:(t Variantslib.Variant.t -> 'result__) -> l0:(t Variantslib.Variant.t -> 'result__) -> l1:(t Variantslib.Variant.t -> 'result__) -> z:(t Variantslib.Variant.t -> 'result__) -> w:(t Variantslib.Variant.t -> 'result__) -> l:(t Variantslib.Variant.t -> 'result__) -> h:(t Variantslib.Variant.t -> 'result__) -> don't_care:(t Variantslib.Variant.t -> 'result__) -> 'result__val make_matcher : u:(t Variantslib.Variant.t -> 'acc__0 -> (Hardcaml__.Import.unit -> 'result__) * 'acc__1) -> x:(t Variantslib.Variant.t -> 'acc__1 -> (Hardcaml__.Import.unit -> 'result__) * 'acc__2) -> l0:(t Variantslib.Variant.t -> 'acc__2 -> (Hardcaml__.Import.unit -> 'result__) * 'acc__3) -> l1:(t Variantslib.Variant.t -> 'acc__3 -> (Hardcaml__.Import.unit -> 'result__) * 'acc__4) -> z:(t Variantslib.Variant.t -> 'acc__4 -> (Hardcaml__.Import.unit -> 'result__) * 'acc__5) -> w:(t Variantslib.Variant.t -> 'acc__5 -> (Hardcaml__.Import.unit -> 'result__) * 'acc__6) -> l:(t Variantslib.Variant.t -> 'acc__6 -> (Hardcaml__.Import.unit -> 'result__) * 'acc__7) -> h:(t Variantslib.Variant.t -> 'acc__7 -> (Hardcaml__.Import.unit -> 'result__) * 'acc__8) -> don't_care:(t Variantslib.Variant.t -> 'acc__8 -> (Hardcaml__.Import.unit -> 'result__) * 'acc__9) -> 'acc__0 -> (t -> 'result__) * 'acc__9val to_rank : t -> Hardcaml__.Import.intval to_name : t -> Hardcaml__.Import.stringval descriptions : (Hardcaml__.Import.string * Hardcaml__.Import.int) Hardcaml__.Import.list