Up
Module
Direct
Signature
val
iter :
cpu_t
-> user:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> unit) -> nice:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> unit) -> sys:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> unit) -> idle:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> unit) -> iowait:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> unit) -> irq:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> unit) -> softirq:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> unit) -> steal:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> unit) -> guest:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> unit) -> unit
val
fold :
cpu_t
-> init:'acc__0 -> user:('acc__0 -> (
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> 'acc__1) -> nice:('acc__1 -> (
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> 'acc__2) -> sys:('acc__2 -> (
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> 'acc__3) -> idle:('acc__3 -> (
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> 'acc__4) -> iowait:('acc__4 -> (
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> 'acc__5) -> irq:('acc__5 -> (
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> 'acc__6) -> softirq:('acc__6 -> (
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> 'acc__7) -> steal:('acc__7 -> (
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> 'acc__8) -> guest:('acc__8 -> (
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> 'acc__9) -> 'acc__9
val
for_all :
cpu_t
-> user:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> bool) -> nice:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> bool) -> sys:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> bool) -> idle:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> bool) -> iowait:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> bool) -> irq:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> bool) -> softirq:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> bool) -> steal:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> bool) -> guest:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> bool) -> bool
val
exists :
cpu_t
-> user:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> bool) -> nice:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> bool) -> sys:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> bool) -> idle:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> bool) -> iowait:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> bool) -> irq:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> bool) -> softirq:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> bool) -> steal:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> bool) -> guest:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> bool) -> bool
val
to_list :
cpu_t
-> user:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> 'elem__) -> nice:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> 'elem__) -> sys:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> 'elem__) -> idle:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
-> 'elem__) -> iowait:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> 'elem__) -> irq:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> 'elem__) -> softirq:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> 'elem__) -> steal:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> 'elem__) -> guest:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option -> 'elem__) -> 'elem__ list
val
map :
cpu_t
-> user:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
->
bigint
) -> nice:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
->
bigint
) -> sys:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
->
bigint
) -> idle:((
cpu_t
,
bigint
)
Fieldslib.Field.t
->
cpu_t
->
bigint
->
bigint
) -> iowait:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option ->
bigint
option) -> irq:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option ->
bigint
option) -> softirq:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option ->
bigint
option) -> steal:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option ->
bigint
option) -> guest:((
cpu_t
,
bigint
option)
Fieldslib.Field.t
->
cpu_t
->
bigint
option ->
bigint
option) ->
cpu_t
val
set_all_mutable_fields :
cpu_t
-> unit