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Module Direct

Signature

val iter : t -> utime:((t, float) Fieldslib.Field.t -> t -> float -> unit) -> stime:((t, float) Fieldslib.Field.t -> t -> float -> unit) -> maxrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> unit) -> ixrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> unit) -> idrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> unit) -> isrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> unit) -> minflt:((t, int64) Fieldslib.Field.t -> t -> int64 -> unit) -> majflt:((t, int64) Fieldslib.Field.t -> t -> int64 -> unit) -> nswap:((t, int64) Fieldslib.Field.t -> t -> int64 -> unit) -> inblock:((t, int64) Fieldslib.Field.t -> t -> int64 -> unit) -> oublock:((t, int64) Fieldslib.Field.t -> t -> int64 -> unit) -> msgsnd:((t, int64) Fieldslib.Field.t -> t -> int64 -> unit) -> msgrcv:((t, int64) Fieldslib.Field.t -> t -> int64 -> unit) -> nsignals:((t, int64) Fieldslib.Field.t -> t -> int64 -> unit) -> nvcsw:((t, int64) Fieldslib.Field.t -> t -> int64 -> unit) -> nivcsw:((t, int64) Fieldslib.Field.t -> t -> int64 -> unit) -> unit
val fold : t -> init:'acc__0 -> utime:('acc__0 -> (t, float) Fieldslib.Field.t -> t -> float -> 'acc__1) -> stime:('acc__1 -> (t, float) Fieldslib.Field.t -> t -> float -> 'acc__2) -> maxrss:('acc__2 -> (t, int64) Fieldslib.Field.t -> t -> int64 -> 'acc__3) -> ixrss:('acc__3 -> (t, int64) Fieldslib.Field.t -> t -> int64 -> 'acc__4) -> idrss:('acc__4 -> (t, int64) Fieldslib.Field.t -> t -> int64 -> 'acc__5) -> isrss:('acc__5 -> (t, int64) Fieldslib.Field.t -> t -> int64 -> 'acc__6) -> minflt:('acc__6 -> (t, int64) Fieldslib.Field.t -> t -> int64 -> 'acc__7) -> majflt:('acc__7 -> (t, int64) Fieldslib.Field.t -> t -> int64 -> 'acc__8) -> nswap:('acc__8 -> (t, int64) Fieldslib.Field.t -> t -> int64 -> 'acc__9) -> inblock:('acc__9 -> (t, int64) Fieldslib.Field.t -> t -> int64 -> 'acc__10) -> oublock:('acc__10 -> (t, int64) Fieldslib.Field.t -> t -> int64 -> 'acc__11) -> msgsnd:('acc__11 -> (t, int64) Fieldslib.Field.t -> t -> int64 -> 'acc__12) -> msgrcv:('acc__12 -> (t, int64) Fieldslib.Field.t -> t -> int64 -> 'acc__13) -> nsignals:('acc__13 -> (t, int64) Fieldslib.Field.t -> t -> int64 -> 'acc__14) -> nvcsw:('acc__14 -> (t, int64) Fieldslib.Field.t -> t -> int64 -> 'acc__15) -> nivcsw:('acc__15 -> (t, int64) Fieldslib.Field.t -> t -> int64 -> 'acc__16) -> 'acc__16
val for_all : t -> utime:((t, float) Fieldslib.Field.t -> t -> float -> bool) -> stime:((t, float) Fieldslib.Field.t -> t -> float -> bool) -> maxrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> ixrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> idrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> isrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> minflt:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> majflt:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> nswap:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> inblock:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> oublock:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> msgsnd:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> msgrcv:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> nsignals:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> nvcsw:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> nivcsw:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> bool
val exists : t -> utime:((t, float) Fieldslib.Field.t -> t -> float -> bool) -> stime:((t, float) Fieldslib.Field.t -> t -> float -> bool) -> maxrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> ixrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> idrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> isrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> minflt:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> majflt:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> nswap:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> inblock:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> oublock:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> msgsnd:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> msgrcv:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> nsignals:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> nvcsw:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> nivcsw:((t, int64) Fieldslib.Field.t -> t -> int64 -> bool) -> bool
val to_list : t -> utime:((t, float) Fieldslib.Field.t -> t -> float -> 'elem__) -> stime:((t, float) Fieldslib.Field.t -> t -> float -> 'elem__) -> maxrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> 'elem__) -> ixrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> 'elem__) -> idrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> 'elem__) -> isrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> 'elem__) -> minflt:((t, int64) Fieldslib.Field.t -> t -> int64 -> 'elem__) -> majflt:((t, int64) Fieldslib.Field.t -> t -> int64 -> 'elem__) -> nswap:((t, int64) Fieldslib.Field.t -> t -> int64 -> 'elem__) -> inblock:((t, int64) Fieldslib.Field.t -> t -> int64 -> 'elem__) -> oublock:((t, int64) Fieldslib.Field.t -> t -> int64 -> 'elem__) -> msgsnd:((t, int64) Fieldslib.Field.t -> t -> int64 -> 'elem__) -> msgrcv:((t, int64) Fieldslib.Field.t -> t -> int64 -> 'elem__) -> nsignals:((t, int64) Fieldslib.Field.t -> t -> int64 -> 'elem__) -> nvcsw:((t, int64) Fieldslib.Field.t -> t -> int64 -> 'elem__) -> nivcsw:((t, int64) Fieldslib.Field.t -> t -> int64 -> 'elem__) -> 'elem__ list
val map : t -> utime:((t, float) Fieldslib.Field.t -> t -> float -> float) -> stime:((t, float) Fieldslib.Field.t -> t -> float -> float) -> maxrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> int64) -> ixrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> int64) -> idrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> int64) -> isrss:((t, int64) Fieldslib.Field.t -> t -> int64 -> int64) -> minflt:((t, int64) Fieldslib.Field.t -> t -> int64 -> int64) -> majflt:((t, int64) Fieldslib.Field.t -> t -> int64 -> int64) -> nswap:((t, int64) Fieldslib.Field.t -> t -> int64 -> int64) -> inblock:((t, int64) Fieldslib.Field.t -> t -> int64 -> int64) -> oublock:((t, int64) Fieldslib.Field.t -> t -> int64 -> int64) -> msgsnd:((t, int64) Fieldslib.Field.t -> t -> int64 -> int64) -> msgrcv:((t, int64) Fieldslib.Field.t -> t -> int64 -> int64) -> nsignals:((t, int64) Fieldslib.Field.t -> t -> int64 -> int64) -> nvcsw:((t, int64) Fieldslib.Field.t -> t -> int64 -> int64) -> nivcsw:((t, int64) Fieldslib.Field.t -> t -> int64 -> int64) -> t
val set_all_mutable_fields : t -> unit