val
make_creator : utime:((
t, float)
Fieldslib.Field.t -> 'acc__0 -> ('input__ -> float)
* 'acc__1) -> stime:((
t, float)
Fieldslib.Field.t -> 'acc__1 -> ('input__ -> float)
* 'acc__2) -> maxrss:((
t, int64)
Fieldslib.Field.t -> 'acc__2 -> ('input__ -> int64)
* 'acc__3) -> ixrss:((
t, int64)
Fieldslib.Field.t -> 'acc__3 -> ('input__ -> int64)
* 'acc__4) -> idrss:((
t, int64)
Fieldslib.Field.t -> 'acc__4 -> ('input__ -> int64)
* 'acc__5) -> isrss:((
t, int64)
Fieldslib.Field.t -> 'acc__5 -> ('input__ -> int64)
* 'acc__6) -> minflt:((
t, int64)
Fieldslib.Field.t -> 'acc__6 -> ('input__ -> int64)
* 'acc__7) -> majflt:((
t, int64)
Fieldslib.Field.t -> 'acc__7 -> ('input__ -> int64)
* 'acc__8) -> nswap:((
t, int64)
Fieldslib.Field.t -> 'acc__8 -> ('input__ -> int64)
* 'acc__9) -> inblock:((
t, int64)
Fieldslib.Field.t -> 'acc__9 -> ('input__ -> int64)
* 'acc__10) -> oublock:((
t, int64)
Fieldslib.Field.t -> 'acc__10 -> ('input__ -> int64)
* 'acc__11) -> msgsnd:((
t, int64)
Fieldslib.Field.t -> 'acc__11 -> ('input__ -> int64)
* 'acc__12) -> msgrcv:((
t, int64)
Fieldslib.Field.t -> 'acc__12 -> ('input__ -> int64)
* 'acc__13) -> nsignals:((
t, int64)
Fieldslib.Field.t -> 'acc__13 -> ('input__ -> int64)
* 'acc__14) -> nvcsw:((
t, int64)
Fieldslib.Field.t -> 'acc__14 -> ('input__ -> int64)
* 'acc__15) -> nivcsw:((
t, int64)
Fieldslib.Field.t -> 'acc__15 -> ('input__ -> int64)
* 'acc__16) -> 'acc__0 -> ('input__ ->
t)
* 'acc__16