Module Fields

val names : string list

val nivcsw : (t, int64) Fieldslib.Field.t

val nvcsw : (t, int64) Fieldslib.Field.t

val nsignals : (t, int64) Fieldslib.Field.t

val msgrcv : (t, int64) Fieldslib.Field.t

val msgsnd : (t, int64) Fieldslib.Field.t

val oublock : (t, int64) Fieldslib.Field.t

val inblock : (t, int64) Fieldslib.Field.t

val nswap : (t, int64) Fieldslib.Field.t

val majflt : (t, int64) Fieldslib.Field.t

val minflt : (t, int64) Fieldslib.Field.t

val isrss : (t, int64) Fieldslib.Field.t

val idrss : (t, int64) Fieldslib.Field.t

val ixrss : (t, int64) Fieldslib.Field.t

val maxrss : (t, int64) Fieldslib.Field.t

val stime : (t, float) Fieldslib.Field.t

val utime : (t, float) Fieldslib.Field.t

val fold : init:'acc__ -> utime:('acc__ -> (t, float) Fieldslib.Field.t -> 'acc__) -> stime:('acc__ -> (t, float) Fieldslib.Field.t -> 'acc__) -> maxrss:('acc__ -> (t, int64) Fieldslib.Field.t -> 'acc__) -> ixrss:('acc__ -> (t, int64) Fieldslib.Field.t -> 'acc__) -> idrss:('acc__ -> (t, int64) Fieldslib.Field.t -> 'acc__) -> isrss:('acc__ -> (t, int64) Fieldslib.Field.t -> 'acc__) -> minflt:('acc__ -> (t, int64) Fieldslib.Field.t -> 'acc__) -> majflt:('acc__ -> (t, int64) Fieldslib.Field.t -> 'acc__) -> nswap:('acc__ -> (t, int64) Fieldslib.Field.t -> 'acc__) -> inblock:('acc__ -> (t, int64) Fieldslib.Field.t -> 'acc__) -> oublock:('acc__ -> (t, int64) Fieldslib.Field.t -> 'acc__) -> msgsnd:('acc__ -> (t, int64) Fieldslib.Field.t -> 'acc__) -> msgrcv:('acc__ -> (t, int64) Fieldslib.Field.t -> 'acc__) -> nsignals:('acc__ -> (t, int64) Fieldslib.Field.t -> 'acc__) -> nvcsw:('acc__ -> (t, int64) Fieldslib.Field.t -> 'acc__) -> nivcsw:('acc__ -> (t, int64) Fieldslib.Field.t -> 'acc__) -> 'acc__

val make_creator : utime:((t, float) Fieldslib.Field.t -> 'compile_acc__ -> ('input__ -> float) * 'compile_acc__) -> stime:((t, float) Fieldslib.Field.t -> 'compile_acc__ -> ('input__ -> float) * 'compile_acc__) -> maxrss:((t, int64) Fieldslib.Field.t -> 'compile_acc__ -> ('input__ -> int64) * 'compile_acc__) -> ixrss:((t, int64) Fieldslib.Field.t -> 'compile_acc__ -> ('input__ -> int64) * 'compile_acc__) -> idrss:((t, int64) Fieldslib.Field.t -> 'compile_acc__ -> ('input__ -> int64) * 'compile_acc__) -> isrss:((t, int64) Fieldslib.Field.t -> 'compile_acc__ -> ('input__ -> int64) * 'compile_acc__) -> minflt:((t, int64) Fieldslib.Field.t -> 'compile_acc__ -> ('input__ -> int64) * 'compile_acc__) -> majflt:((t, int64) Fieldslib.Field.t -> 'compile_acc__ -> ('input__ -> int64) * 'compile_acc__) -> nswap:((t, int64) Fieldslib.Field.t -> 'compile_acc__ -> ('input__ -> int64) * 'compile_acc__) -> inblock:((t, int64) Fieldslib.Field.t -> 'compile_acc__ -> ('input__ -> int64) * 'compile_acc__) -> oublock:((t, int64) Fieldslib.Field.t -> 'compile_acc__ -> ('input__ -> int64) * 'compile_acc__) -> msgsnd:((t, int64) Fieldslib.Field.t -> 'compile_acc__ -> ('input__ -> int64) * 'compile_acc__) -> msgrcv:((t, int64) Fieldslib.Field.t -> 'compile_acc__ -> ('input__ -> int64) * 'compile_acc__) -> nsignals:((t, int64) Fieldslib.Field.t -> 'compile_acc__ -> ('input__ -> int64) * 'compile_acc__) -> nvcsw:((t, int64) Fieldslib.Field.t -> 'compile_acc__ -> ('input__ -> int64) * 'compile_acc__) -> nivcsw:((t, int64) Fieldslib.Field.t -> 'compile_acc__ -> ('input__ -> int64) * 'compile_acc__) -> 'compile_acc__ -> ('input__ -> t) * 'compile_acc__

val create : utime:float -> stime:float -> maxrss:int64 -> ixrss:int64 -> idrss:int64 -> isrss:int64 -> minflt:int64 -> majflt:int64 -> nswap:int64 -> inblock:int64 -> oublock:int64 -> msgsnd:int64 -> msgrcv:int64 -> nsignals:int64 -> nvcsw:int64 -> nivcsw:int64 -> t

val map : utime:((t, float) Fieldslib.Field.t -> float) -> stime:((t, float) Fieldslib.Field.t -> float) -> maxrss:((t, int64) Fieldslib.Field.t -> int64) -> ixrss:((t, int64) Fieldslib.Field.t -> int64) -> idrss:((t, int64) Fieldslib.Field.t -> int64) -> isrss:((t, int64) Fieldslib.Field.t -> int64) -> minflt:((t, int64) Fieldslib.Field.t -> int64) -> majflt:((t, int64) Fieldslib.Field.t -> int64) -> nswap:((t, int64) Fieldslib.Field.t -> int64) -> inblock:((t, int64) Fieldslib.Field.t -> int64) -> oublock:((t, int64) Fieldslib.Field.t -> int64) -> msgsnd:((t, int64) Fieldslib.Field.t -> int64) -> msgrcv:((t, int64) Fieldslib.Field.t -> int64) -> nsignals:((t, int64) Fieldslib.Field.t -> int64) -> nvcsw:((t, int64) Fieldslib.Field.t -> int64) -> nivcsw:((t, int64) Fieldslib.Field.t -> int64) -> t

val iter : utime:((t, float) Fieldslib.Field.t -> unit) -> stime:((t, float) Fieldslib.Field.t -> unit) -> maxrss:((t, int64) Fieldslib.Field.t -> unit) -> ixrss:((t, int64) Fieldslib.Field.t -> unit) -> idrss:((t, int64) Fieldslib.Field.t -> unit) -> isrss:((t, int64) Fieldslib.Field.t -> unit) -> minflt:((t, int64) Fieldslib.Field.t -> unit) -> majflt:((t, int64) Fieldslib.Field.t -> unit) -> nswap:((t, int64) Fieldslib.Field.t -> unit) -> inblock:((t, int64) Fieldslib.Field.t -> unit) -> oublock:((t, int64) Fieldslib.Field.t -> unit) -> msgsnd:((t, int64) Fieldslib.Field.t -> unit) -> msgrcv:((t, int64) Fieldslib.Field.t -> unit) -> nsignals:((t, int64) Fieldslib.Field.t -> unit) -> nvcsw:((t, int64) Fieldslib.Field.t -> unit) -> nivcsw:((t, int64) Fieldslib.Field.t -> unit) -> unit

val for_all : utime:((t, float) Fieldslib.Field.t -> bool) -> stime:((t, float) Fieldslib.Field.t -> bool) -> maxrss:((t, int64) Fieldslib.Field.t -> bool) -> ixrss:((t, int64) Fieldslib.Field.t -> bool) -> idrss:((t, int64) Fieldslib.Field.t -> bool) -> isrss:((t, int64) Fieldslib.Field.t -> bool) -> minflt:((t, int64) Fieldslib.Field.t -> bool) -> majflt:((t, int64) Fieldslib.Field.t -> bool) -> nswap:((t, int64) Fieldslib.Field.t -> bool) -> inblock:((t, int64) Fieldslib.Field.t -> bool) -> oublock:((t, int64) Fieldslib.Field.t -> bool) -> msgsnd:((t, int64) Fieldslib.Field.t -> bool) -> msgrcv:((t, int64) Fieldslib.Field.t -> bool) -> nsignals:((t, int64) Fieldslib.Field.t -> bool) -> nvcsw:((t, int64) Fieldslib.Field.t -> bool) -> nivcsw:((t, int64) Fieldslib.Field.t -> bool) -> bool

val exists : utime:((t, float) Fieldslib.Field.t -> bool) -> stime:((t, float) Fieldslib.Field.t -> bool) -> maxrss:((t, int64) Fieldslib.Field.t -> bool) -> ixrss:((t, int64) Fieldslib.Field.t -> bool) -> idrss:((t, int64) Fieldslib.Field.t -> bool) -> isrss:((t, int64) Fieldslib.Field.t -> bool) -> minflt:((t, int64) Fieldslib.Field.t -> bool) -> majflt:((t, int64) Fieldslib.Field.t -> bool) -> nswap:((t, int64) Fieldslib.Field.t -> bool) -> inblock:((t, int64) Fieldslib.Field.t -> bool) -> oublock:((t, int64) Fieldslib.Field.t -> bool) -> msgsnd:((t, int64) Fieldslib.Field.t -> bool) -> msgrcv:((t, int64) Fieldslib.Field.t -> bool) -> nsignals:((t, int64) Fieldslib.Field.t -> bool) -> nvcsw:((t, int64) Fieldslib.Field.t -> bool) -> nivcsw:((t, int64) Fieldslib.Field.t -> bool) -> bool

val to_list : utime:((t, float) Fieldslib.Field.t -> 'elem__) -> stime:((t, float) Fieldslib.Field.t -> 'elem__) -> maxrss:((t, int64) Fieldslib.Field.t -> 'elem__) -> ixrss:((t, int64) Fieldslib.Field.t -> 'elem__) -> idrss:((t, int64) Fieldslib.Field.t -> 'elem__) -> isrss:((t, int64) Fieldslib.Field.t -> 'elem__) -> minflt:((t, int64) Fieldslib.Field.t -> 'elem__) -> majflt:((t, int64) Fieldslib.Field.t -> 'elem__) -> nswap:((t, int64) Fieldslib.Field.t -> 'elem__) -> inblock:((t, int64) Fieldslib.Field.t -> 'elem__) -> oublock:((t, int64) Fieldslib.Field.t -> 'elem__) -> msgsnd:((t, int64) Fieldslib.Field.t -> 'elem__) -> msgrcv:((t, int64) Fieldslib.Field.t -> 'elem__) -> nsignals:((t, int64) Fieldslib.Field.t -> 'elem__) -> nvcsw:((t, int64) Fieldslib.Field.t -> 'elem__) -> nivcsw:((t, int64) Fieldslib.Field.t -> 'elem__) -> 'elem__ list

val map_poly : ([< ], t, 'x0) Fieldslib.Field.user -> 'x0 list